Analytical Model for High Level Power Modeling of Combinational and Sequential Circuits†

In this paper, we propose a modeling approach that captures the dependence of the power dissipation of a (combinational or sequential) logic circuit on its input/output signal switching statistics. The resulting power macromodel, consists of a quadratic or cubic equation in four variables, that can be used to estimate the power consumed in the circuit for any given input/output signal statistics. Given a low-level (typically gate-level) description of the circuit, we describe a characterization process that uses a recursive least squares (RLS) algorithm by which such a equation-based model can be automatically built. The four variables of our model are the average input signal probability, average input switching activity, average input spatial correlation coefficient and average output zero-delay switching activity. This approach has been implemented and models have been built and tested for many combinational and sequential benchmark circuits.